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---+ U-Boot/MIPS Notes ---++ TODOs _Feel free to add your ideas here_ * Little endian build * Cache rework * Unify all board's link directives * Need to extend ROM exception handlers, and if console available, print panic() * do_bootelf() issue; 1) fix dcache_disable itself or 2) insert flush_cache() before dcache_disable() ---++ startup sequence <verbatim> _start - cpu/mips/start.S init CP0.WATCHLO init CP0.WATCHHI init CP0.STATUS init CP0.CAUSE init CP0.COUNT init CP0.COMPARE init CP0.CONFIG init $gp - used for ROM code jalr lowlevel_init jalr mips_cache_reset update CP0.CONFIG jalr mips_cache_lock - hmm. j board_init_f - lib_mips/board.c processing init_sequence[] calc stack; relocate_code() - back to cpu/mips/start.S /* * relocation */ relocate_code: set $sp; calc new $gp - used for *relocated codes* set $gp copy codes - main relocation j in_ram - jump to in_ram on the memory in_ram: update got entries clear bss j board_init_r - lib_mips/board.c relocate the command table flash_init() mem_malloc_init() malloc_bin_reloc() env_relocate() pci_init() devices_init() jumptable_init() console_init_r() misc_init_r() eth_initialize() main_loop() </verbatim>