BoardcanyonlandsFaq < DULG

%SECTION0{name=BoardcanyaonlandsFaq}% Applied Micro Canyonlands FAQ
%TOC%
---+++ Update CPLD Code
   Problem:: In some rare cases it may be necessary or advisable 
     to update the CPLD code on the board.
     New versions of the CPLD code are available from the
     FIXME.
     %BR% %X% %RED% *WARNING:* this is a critical operation;
     you may damage your hardware! %ENDCOLOR%
     %BR% Think twice if you *really* know what you are doing.
   Requirements:: You need a JTAG programmer like the !ByteBlaster II or
     !ByteBlaster MV to program the CPLD.
     Please contact
     [[mailto:office@denx.de?subject=Please%20send%20information%20about%20ByteBlaster][DENX Computer Systems !GmbH]]
     if you need one.
   Preparations:: We need software to control the JTAG programmer,
     a BSDL description file for the CPLD used on the Canyonlands board,
     and the CPLD code (in Serial Vector Format).
      1 Download and install the [[http://www.urjtag.org/][UrJTAG]]
        Universal JTAG Library, Server and Tools package:
   <verbatim>
$ cd /usr/local/src
$ wget http://sourceforge.net/projects/urjtag/files/urjtag/0.10/urjtag-0.10.tar.gz/download
$ tar -zxf urjtag-0.10.tar.gz
$ cd urjtag-0.10
$ ./configure
$ make
$ sudo make install
        </verbatim>
      1 Download the BSDL description file for the
        [[http://www.altera.com/support/devices/bsdl/max2/max2-index.jsp][Altera EPM240T100 CPLD]]:
        <verbatim>
$ cd /tmp
$ wget ftp://ftp.altera.com/outgoing/download/bsdl/EPM240T100.BSD
$ sudo mkdir -p /usr/local/share/urjtag/altera/epm240t100
$ sudo mv EPM240T100.BSD /usr/local/share/urjtag/altera/epm240t100
        </verbatim>
      1 Download the CPLD code attached to this webpage.
      1 Plug the connector of the !ByteBlaster on connector "CPLD_JTAG" of your Canyonlands board.  Pin 1 is towards the serial connectors.
      1 Power on your Canyonlands.
   Solution:: Now we can program the CPLD with the new code:
     <verbatim>
$ sudo jtag
jtag> cable ByteBlaster parallel 0x378
jtag> bsdl path /usr/local/share/urjtag/altera/epm240t100
jtag> detect
jtag> print
jtag> part 0
jtag> svf /tmp/DES0225_12_CPLD_01.svf progress
jtag> quit
     </verbatim>
     Programming will take about 2 minutes.
     You can safely ignore the ``unimplemented mode 'ABSENT' for TRST''
     message.

Available SVF Files:
   * [[%ATTACHURL%/DES0225_12_CPLD_01.svf][DES0225_12_CPLD_01.svf]]: Canyonlands CPLD file version DES0225_12_CPLD_01
%X% *NOTE:* Make sure you *really* understand what you are doing.
Don't complain if you break your hardware.
You have been warned.