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---++!! ARIA FPGA Update using !UrJtag %TOC% ---++ Abstract This application note describes how the FPGA code on the MPC5121 based [[http://www.denx.de/en/Hardware/HardwareARIA][ARIA board]] can be updated using the [[http://www.urjtag.org/][UrJTAG]] Universal JTAG tools. ---++ Author This document was written by Anatolij Gustschin (agust {at} denx {dot} de). Minor editing was done by Wolfgang Denk (wd {at} denx {dot} de). ---++ Introduction To offer maximum flexibility in each design, the ARIA board combines the MPC5121e with a powerful FPGA, which which allows for adaptable I/O expansion as well as complete for adding IP-cores for additonal customized interfaces. To make use of this flexibility, it may be necessary to install new versions of the FPGA code. Also, sometimes updated versions of the FPGA code become available that fix problems and/or add new features. In some hardware configurations the required JTAG pins of the FPGA are connected to GPIO ports, so updates of the FPGA code can be done in software, without using external tools like a dedicated JTAG programmer. Instead of writing custom software for this purpose, we decided to use the standard [[http://www.urjtag.org/][!UrJTAG]] Universal JTAG tool. ---++ WARNING and LEGAL DISCLAIMER %X% Updating the FPGA code is a *very critical operation*. First of all, any attempts to meddle with the FPGA code will void any warranty you might have. And if anything goes wrong your board will be broken, and you will not be able to fix it. There is absolutely, positively *NO WARRANTY*, neither express or implied, offered with this documentation and software. You use this documentation and software at your own risk. In case of loss, no person or entity owes you anything whatsoever. You have been warned. *You have been warned!* ---++ <nop>UrJTAG Setup for ARIA Board On the host: <verbatim> $ wget http://surfnet.dl.sourceforge.net/sourceforge/urjtag/urjtag-0.10.tar.bz2 $ tar xjf urjtag-0.10.tar.bz2 $ cd urjtag-0.10 $ patch -p1 < 0001-add-aria-driver.patch </verbatim> %X% !!! *WARNING* !!! If you are using a Rev.1 CPU, then edit the ="src/tap/cable/aria_gpio.c"= file _now_ and comment out ="#define CPU_IS_REV_2"= in this file. <verbatim> $ autoreconf $ sudo cp -rd urjtag-0.10 /opt/eldk/ppc_6xx/root/ </verbatim> On the target: <verbatim> # cd /root/urjtag-0.10 # ./configure --enable-cable=aria_gpio --disable-bus # make # make install ... /usr/bin/install: will not overwrite just-created `/usr/local/share/urjtag/analog/PARTS' with `analog/PARTS' make[2]: *** [install-nobase_dist_pkgdataDATA] Error 1 make[2]: Leaving directory `/root/urjtag-0.10-test/data' make[1]: *** [install-am] Error 2 make[1]: Leaving directory `/root/urjtag-0.10-test/data' make: *** [install-recursive] Error 1 </verbatim> After this error proceed as below: <verbatim> # cd src # make install </verbatim> On the target we also need some additional files (provided with this README). Copy them to the target root file system. Also copy the SVF file with the new FPGA code to the target: <verbatim> $ sudo cp -rd lfxp2-17e-ftbga256/ /opt/eldk/ppc_6xx/usr/local/share/urjtag/lattice/ $ sudo cp PARTS /opt/eldk/ppc_6xx/usr/local/share/urjtag/lattice/PARTS $ sudo cp ARIA-17I5-0-0.2.2-200MHZ-DENX.SVF /opt/eldk/ppc_6xx/tmp/ </verbatim> Now try to update the FPGA on the ARIA board. Here is the !UrJTAG commands summary when running on the target: <verbatim> -bash-3.2# jtag jtag> cable aria_gpio jtag> detect jtag> print jtag> part 0 jtag> frequency 1000000 jtag> frequency 1000000 jtag> svf /tmp/ARIA-17I5-0-0.2.2-200MHZ-DENX.SVF progress jtag> q </verbatim> Power cycle and check if the update was okay. On success you should see something like this: <verbatim> U-Boot 2009.06-rc3-00151-g2ac050e-dirty (Jun 14 2009 - 19:58:01) MPC512X CPU: MPC5121e rev. 2.0, Core e300c4 at 396 MHz, CSB at 198 MHz Board: ARIA ... </verbatim> ---++ Example log file For reference, here is a complete log: <verbatim> login: root Last login: Wed Feb 4 10:27:07 on console -bash-3.2# -bash-3.2# jtag UrJTAG 0.10 #1502 Copyright (C) 2002, 2003 ETC s.r.o. Copyright (C) 2007, 2008, 2009 Kolja Waschk and the respective authors UrJTAG is free software, covered by the GNU General Public License, and you are welcome to change it and/or distribute copies of it under certain conditions. There is absolutely no warranty for UrJTAG. WARNING: UrJTAG may damage your hardware! Type "quit" to exit, "help" for help. jtag> cable aria_gpio Initializing Aria GPIO JTAG Chain aria_init: aria_gpio_open: DIR 0x8030000 aria_gpio_open: ODR 0x0 aria_gpio_open: GPIO_BITMASK 0xf7fcfff7, GPIO_OUTPUT_MASK 0x8 aria_gpio_open: J1850_TX 0x103 aria_gpio_open: PSC6_2 0x183 aria_gpio_open: PSC6_3 0x183 jtag> detect IR length: 8 Chain length: 1 Device Id: 00000001001010011011000001000011 (0x000000000129B043) Manufacturer: Lattice Semiconductors Part(0): LFXP2-17E-ftBGA256 Stepping: 0 Filename: /usr/local/share/urjtag/lattice/lfxp2-17e-ftbga256/lfxp2-17e-ftbga256 jtag> print No. Manufacturer Part Stepping Instruction Register ------------------------------------------------------------------------------------------------------------------ 0 Lattice Semiconductors LFXP2-17E-ftBGA256 0 BYPASS BYPASS jtag> part 0 jtag> frequency Current TCK frequency is 0 Hz jtag> frequency 1000000 Setting TCK frequency to 1000000 Hz requested frequency 1000000, now calibrating delay loop new real frequency 460368, delay 0 operating without delay done jtag> frequency 1000000 Setting TCK frequency to 1000000 Hz requested frequency 1000000, now calibrating delay loop new real frequency 2.05553e+06, delay 0 new real frequency 1.97417e+06, delay 1 new real frequency 2.0562e+06, delay 2 new real frequency 1.88703e+06, delay 4 new real frequency 1.60089e+06, delay 7 new real frequency 1.32192e+06, delay 11 new real frequency 1.16164e+06, delay 14 new real frequency 1.05743e+06, delay 16 done jtag> frequency Current TCK frequency is 1057431 Hz jtag> svf /tmp/ARIA-17I5-0-0.2.2-200MHZ-DENX.SVF progress ... Parsing 51730/51736 ( 99%) Scanned device output matched expected TDO values. jtag> q -bash-3.2# </verbatim> ---++ Attachments * [[%ATTACHURL%/0001-add-aria-driver.patch][0001-add-aria-driver.patch]]: Patch to add the GPIO "cable" driver for ARIA * [[%ATTACHURL%/lfxp2-17e-ftbga256.tar.gz][lfxp2-17e-ftbga256.tar.gz]]: FPGA description files * [[%ATTACHURL%/ARIA-17I5-0-0.2.2-200MHZ-DENX.SVF][ARIA-17I5-0-0.2.2-200MHZ-DENX.SVF]]: ARIA FPGA Code Version 17I5-0-0.2.2-200MHZ